SNUG Korea 2024에 여러분을 초대합니다.

지난번에 공지해드린대로 7월 10일 (수) 삼성동 그랜드 인터컨티넨탈 파르나스 서울 그랜드 볼룸에서 진행될 SNUG Korea 2024 에 여러분을 초대합니다.

본 행사는 본사의 EDA그룹 General Manager이신 Shankar Krishnamoorthy님, 삼성전자 계종욱 실장님, ARM Korea의 황선욱 사장님, NVIDIA APAC Technical Marketing Sr. Director이신 Jeffrey Yen님의 기조연설과 더불어 HBM/3DIC, AI, New Technology 트랙에서 당사의 최신기술동향 및 고객 성공사례 발표를 준비하였습니다.

이 시간을 통해 반도체 업계 관계자분들과 네트워킹하며 다양한 정보를 공유할 수 있는 의미있는 장소를 준비하였으니 많은 참여 부탁드립니다.

바쁘시겠지만 사전등록하시고 참석해주시기 바랍니다.

감사합니다.
Sr. Regional VP, 소경신

AGENDA

08:30-09:00
Registration
09:00-09:05
Welcome speech by GS So/Sr. Regional VP
09:05-09:50
Keynote speech by Shankar Krishnamoorthy/General Manager
09:50-10:20
Keynote by Jongwook Kye/Executive VP of Samsung Electronics
10:20-10:50
Keynote by Seonwook Hwang/President of ARM Korea
10:50-11:20
Keynote by Jeffrey Yen/APAC Technical Marketing Sr. Director of NVIDIA
11:20-11:35
Break
원하는 트랙을 확인해보세요
HBM / 3DIC
AI
New Digital Technology
11:35-12:05
2.5D HBM Silicon Interposer Design, Today and Tomorrow
Speaker: Yongjin Hong/Samsung
Customer Keynote
Speaker: JoonHo Baek/Furiosa.ai
Synopsys Energy Efficiency Solution: Technology Update
Speaker: Jay Roy/Synopsys
12:05-12:35
Platform Architect - Multi-Die Solution for Multi-Die System
Speaker: Ingwang Chang/Synopsys
Synopsys.ai - Unlock the Potential of AI-Driven Chip Design
Speaker: Geetha Rangarajan/Synopsys
Primepower RTL Update - the Next Generation of RTL Power Analysis
Speaker: Steve Kim/Synopsys
12:35-13:35
Lunch
13:35-14:05
PrimeSim HT (Hybrid Timing) Solution Introduction
Speaker: Jace Lee/Synopsys
Explore Synopsys.ai Copilot : Power of Generative AI at Your Fingertips for Every Design Workflow
Speaker: Geetha Rangarajan/Synopsys
Formality - New 1-step Formality solution for TAT reduction and Risk-free verification
Speaker: JaeSeung Choi/Samsung
14:05-14:35
A Multiphysics Solution for Multi-Die Integrated (MDI) 2.5D/3D ICs provided by Ansys
Speaker: Kiwook Jung/Ansys
DSO.ai - Application-driven optimizations of metal stack and PDN using machine learning framework
Speaker: Hosoon Shin/Synopsys
Fusion Compiler - How to Achieve the Best PPA with MLMP
Speaker: Sabina Yang/Synopsys
14:35-15:05
Electronic and Photonic Co-Design for High-Speed Interconnects with Synopsys OptoCompiler
Speaker: Twan Korthorst/Synopsys
VSO.ai - AI-Driven Coverage Closure & Analytics
Speaker: HC Lee/Synopsys
Test Overview and End-to-End Solutions
Speaker: DongJae Song/Synopsys
15:05-15:20
Break
New AMS / IP Technology
AI
New Verification Technology
15:20-15:50
ICV's Elastic CPU Functionality for Better Resource Management on Samsung Designs
Speaker: Jaehong Kim/Samsung
ASO.ai - AI-driven Design Migration and Optimization Solution
Speaker: Suyeong Kim/Samsung
DongHee Kim/Synopsys
Next-Generation Verdi: Overview of New Debug and Verification Management
Speaker: Nasser Lin/Synopsys
15:50-16:20
Efficient High Sigma Monte Carlo Analysis for Standard Cells with PrimeSim Design Robustness
Speaker: Kwonchil Kang/Samsung, SeungWan Kim/Synopsys
TSO.ai - AI Driven Test Solution
Speaker: SooChang Park/Synopsys
ZeBu CXL Solution for CXL2.0 Memory
Speaker: Kyouha Nam/Samsung
16:20-16:50
Increasing Challenge of IP Quality for Various Automotive Application and Innovative Solution for it
Speaker: Hyungbae Choi/Synopsys
Silicon.da: Volume Diagnostics Feature to Identity Systematic Yield Issue from Design to Manufacturing
Speaker: Yoseop Lee/Samsung
Early-Stage Design Verification and System Validation for AI Accelerator Systems
Speaker: Hyungseok Heo/Rebellions
Sunghwan Jo/Synopsys
16:50-17:20
Innovating with Rebellions AI SoC: A Deep Dive into 1st Generation PCIe based Scale-Out Architecture and Case Studies
Speaker: Sungpill Choi/Rebellions
JW Park/Synopsys
Learn How to Leverage Your Design Data to Spot Problems and Take Action with Synopsys Design.da
Speaker: Kyoung-In Cho/Synopsys
Improve PPA & Avoid CDC Bugs with Static-Aware Synthesis Flow
Speaker: JeongHoon Heo/Samsung
17:20-17:30
Closing & Luckydraw

INFORMATION

  • 행사장 여건 상 신청하신 모든 분들을 모시지 못하는 것을 사전 양해 부탁드립니다.
  • 본 행사는 사전등록 후 참가 확정 메일 및 문자를 받으신 분들에 한해 입장이 가능합니다.
  • 주차 공간이 협소하오니 가급적 대중교통을 이용해주시기 바랍니다.
  • 참석하시는 모든 분들께 소정의 기념품이 제공됩니다.

행사 운영사무국

e-mail: synopsys@onpaper.co.kr

오시는 길

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Shankar Krishnamoorthy
Graphics Hardware Design Engineer/Intel
Nitin Navale has worked across AMD & Xilinx since 2008 and currently serves as Principal Member of Technical Staff in the CAD/Methodology team. His current role is Technical Lead for 3DIC Methodology, though he has previously also worked on design automation that ranges across STA, EM/IR, Thermal, ESD, SOC Floorplanning & Construction, IP Management, Netlisting, and Characterization. Nitin earned his BS and MS in Electrical Engineering from the University of Illinois, Urbana-Champaign. Outside of work, he is consumed by his devotion to board games and strategy. He's also an avid musician who plays multiple instruments with an active interest in music theory.
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